Recently, various types of electronic devices are being used widely. Especially, with the development of communication technologies, mobile devices such as smart phones, personal digital assistants (PDAs) and tablet PCs, as well as computers such as desktops and laptops have become popular.
These electronic devices typically include memories for executing programs etc. Performances and sizes of the electronic devices may be affected by performances and sizes of the memories.
FIG. 1 illustrates a hierarchical memory structure applied to a prior art memory system.
A memory system 1 according to the conventional technology includes a L1/L2 cache memory layer 10, a main memory layer 20 and a storage device 30, and provides data to a central processing unit (CPU).
The L1/L2 cache memory layer 10 and the main memory layer 20 consist of volatile memories such as SRAM and DRAM. The storage device 30 consists of nonvolatile memories such as a flash memory and a hard disk drive (HDD).
In general, a high-priced memory with fast read/write speeds is used for a memory in an upper layer of the memory layer structure. A low-cost memory with relatively slow read/write speeds is used for a memory in a lower layer of the memory layer structure. In the embodiment shown in FIG. 1, the L1/L2 cache memory layer 10 is the uppermost memory layer, and the storage device 30 is the lowermost memory layer.
In the conventional technology as shown in FIG. 1, the CPU 40 acquires data for execution of a programs etc. from the storage device 30. The CPU 40 stores the acquired data in the L1/L2 cache memory layer 10 and the main memory layer 20.
To perform data read or write operations, the CPU 40 requests the L1/L2 cache memory layer 10 for the necessary data, i.e., a memory reference. If the requested data does not exist in the L1/L2 cache memory layer 10, a reference failure (cache miss) may occur.
If a reference failure (cache miss) occurs, the main memory layer 20 is in turn requested to handle the read reference or write reference operation for the data for which the reference failure occurred.
As described above, according to the conventional technology, when a reference failure occurs in the uppermost memory layer, e.g., the L1/L2 cache memory layer, the read or write reference is performed in the main memory layer, which is a lower layer than the uppermost memory layer. Both the uppermost memory layer and the main memory layer consist of volatile memories.
A volatile memory and a nonvolatile memory have different characteristics with respect to density, read and write speeds, power consumption etc. In general, read and write speeds of the volatile memory are faster than those of the nonvolatile memory. Density of the nonvolatile memory is higher than that of the volatile memory.
Recently, as the development of nonvolatile memories is being actively made, access speeds of the nonvolatile memories are being increasingly improved. In particular, the difference between the read speeds of the nonvolatile memories and those of the volatile memories continues to be significantly decreased. Accordingly, it is desired to develop a memory system which includes a nonvolatile memory as well as a volatile memory, and can enjoy the above-described strong characteristics of both the nonvolatile memory and the volatile memory.